Additionally, the quantitative result is obtained though simulation, and suggestion is presented for the designers of clock source and data acquisition system. 并通过仿真给予定量的计算,对时钟源和数据采集系统的设计提供了一些建议;
A fast simulation environment has been developed using MATLAB and SIMULINK for behavioral level simulation of spread spectrum clock generator based Fractional-N frequency synthesizers. 提出了一种展频时钟生成的方法,使用MATLAB和SIMULINK开发出了快速模拟基于分数N型频率合成器的展频时钟生成器的环境。
THE SIMULATION AND ANALYSIS OF THREE KINDS OF FH SEQUENCES Design of a clock controlled FH sequences based on chaos 三种跳频码序列的仿真及其性能分析一种新型钟控混沌跳频序列构造方法
Simulation and Termination Methods for Board Level High Speed Clock Signals 板级高速时钟信号建模仿真与端接方法
Application of simulation analysis in electromagnetic compatibility design of clock circuit 仿真分析在时钟电路电磁兼容设计中的应用
Because of the synchronization of simulation clock, the discrete simulation algorithm can't meet the reguirement. 对于分布并发事件仿真因为仿真时钟同步问题,原有的离散事件仿真方法不能很好的进行模拟。
It was mostly stated simulation calculation, clock setting, error compensation and expert rules of Train Group Running Simulation System and simply introduced module structure, simulation background of the System. 重点介绍列车群运行仿真系统的仿真计算、时钟设置、误差补偿以及采用的专家规则,并对系统的模块构成和仿真背景作了介绍。
Monte Carlo Method Applied to Simulation of Atomic Clock Noise 原子钟噪声的蒙特卡络模拟方法
Simulation show that only 230 clock cycles are needed to finish filtering a macroblock for deblocking filter, and the synthesized logic gate count is only 14K under 0.18 μ m technology when the maximum frequency is 100 MHz. 仿真结果显示,一个宏块去块效应滤波仅需要230个周期。在0.18μm工艺下,最大频率100M时,综合逻辑门数为14K。
Simulation results show the PLL clock frequency multiplier has lower phase noise and shorter capture time. 结果表明,PLL倍频器具有较低的噪声和较高的捕获速度。
Design and Simulation of Computer External Clock Synchronization System based on Probabilistic Synchronization Algorithms 基于概率同步算法的计算机外时钟同步系统设计与仿真
System Design and Simulation of Write Clock Recovery for DVD Data DVD写时钟恢复电路系统的设计与仿真
T he framework consists of Input Inter-face Control, Output Interface Control, Model Structure Control, Simulation Clock Control, Experiment Data Control, Sim u-lation Experiment Control and Simulation Logic Control. 该框架包括了输入接口控制、输出接口控制、模型结构控制、仿真时钟控制、实验数据控制、仿真实验控制、仿真逻辑控制七个功能元素。
E1 Circuit Simulation and Clock Synchronization Technology in EPON EPON系统E1电路仿真及其时钟同步技术
Time consistency solves the problem of distributed simulation system clock synchronization. 时间一致性需要解决分布式仿真系统中各仿真节点的时钟同步问题。
Data-driven technology is implemented by "sample-advancing mechanism" to solve the simulation clock advancing problem in distributed environment. 提出采样推进法的概念并实现了数据驱动,解决了分布交互式通信系统仿真中,算法单元的仿真时钟推进问题。
In order to achieve a real-time and scalable framework, some critical techniques have been discussed: distributed data collection and replay, the design and administration of distributed simulation database, the management of distributed clock. 为了满足仿真管理的实时性和可伸缩性,本文着重研究了以下一些关键技术:分布式数据收集和回放,分布式仿真数据库的设计和管理,以及分布式时钟管理。
This paper firstly introduces the theory of the discrete event system simulation, and compares the four simulation tactics with each other, and then makes sure to use tenor alternation method to manage simulation clock. 本论文首先从离散事件系统仿真原理出发,通过四种仿真策略的比较,确定采用进程交互法实现仿真钟的管理。
Simulation and Research of the Effect Caused by Clock Jitter on ADC Conversion 时钟抖动对ADC变换性能影响的仿真与研究
This paper surveys the concept of time in computer, discusses the common methods of time simulation in computer instruction-set simulator, and finally analyzes various kinds of simulation technologies and their applications by concentrating on clock interrupt simulation. 本文介绍了计算机系统的时间概念,讨论了计算机指令集仿真器中时间仿真的一般原理和方法,并以时钟中断仿真为核心分析了各种时钟仿真技术及其应用。
Design and Simulation of Spread Spectrum Clock Generator 展频时钟生成器的设计与仿真
As the operating of simulation clock, the system dynamically displayed the radar netting detection and the electromagnetic situation of interference in real time. At last the evaluation result of confrontation was given. 随着仿真时钟的运行,动态实时显示雷达网探测与干扰的电磁态势,最后给出对抗评估结果。
Design and Simulation of Electronics Clock System Based on Single Chip Microcontroller 单片机电子时钟系统的设计与仿真
Through the simulation result, determine the clock recovery circuit performance meet Ethernet requirements. 通过分析仿真结果,确定了该时钟恢复电路的性能满足以太网的要求。
The simulator is a discrete event simulation, using cycle scanning method to promote simulation clock. 该仿真器是一个离散事件仿真器,采用周期扫描法推进仿真时钟。
40 Gb/ s simulation and 10 Gb/ s experiment are performed using tunable clock or data-related signal as the phase pre-modulating signal. The eye opening and receiver sensitivity are improved and the dispersion tolerance is doubled when the phase pre-modulation is imposed on NRZ signals. 10Gb/s实验和40Gb/s仿真结果表明,采用时钟信号和数据相关信号对非归零码进行可调节的相位预调制,可增加信号的眼图开启度和接收灵敏度,将系统的色散容限提高1倍左右。
We do a thorough research into some of the key points of workflow simulation: event simulation, resource management simulation, organizational privilege simulation, simulation clock control, activity execution time, random variable generation and scheduling algorithms. 对工作流仿真中的几项关键点:事务的仿真、资源管理仿真、组织权限仿真、仿真时钟控制、活动执行时间、随机变量的产生、调度算法等做了深入研究。
Theoretical analysis and simulation of RF power measurement, channel design, and clock synthesis, and draw the schematic and PCB. Finally, test the designed circuit. 理论分析和仿真了射频大功率测量、通道设计和时钟合成,绘制了原理图和PCB。最后,测试所设计的硬件电路。